September, 2026 - GIGALIGHT

18Sep, 2026

GIGALIGHT Announces 3.2T HYBRID Product Technical Solution and Benefits

Shenzhen, September 14, 2026 — GIGALIGHT, a global innovator in high-speed optical interconnects, today officially announced its HYBRID 3.2T Semi-DSP heterogeneous optical module technology roadmap and product plan.

At a time when 1.6T is just entering large-scale pilot deployment and 3.2T (equivalent to 16×224G or 32×100G) is approaching rapidly, GIGALIGHT is extending its proven “Semi-DSP + half-linear” HYBRID architecture, already validated at 800G, into a pluggable 3.2T form factor.

The company presents this as a practical evolutionary path that does not depend on new full-DSP capacity, does not force liquid-cooling upgrades, and retains serviceability.

I. Three Major Challenges Facing the 3.2T Era

Full-DSP 3.2T: Power consumption rises to the 40–50W range, which is difficult for an air-cooled front panel to handle.

Pure-linear LPO/NPO 3.2T: 224G/lane is extremely sensitive to Host SerDes and PCB losses, while interoperability risks are high for 500m single-mode transmission and multi-vendor deployments.

LRO single-direction DSP: The chips are niche products, have long lead times, and the ecosystem has not yet matured.

GIGALIGHT’s answer: the HYBRID product architecture

HYBRID = (LRO + LTO) / 2

Among the 8/16 channels, only half use mature duplex DSPs, while the other half use direct linear drive. System-level clock/phase sharing is used to provide reference information to the linear side.

II. Key Technical Elements of the HYBRID 3.2T Solution

Channel architecture: Of the 16 channels at 224G/lane, 8 retain full-DSP retiming, while the other 8 use direct drive with a linear Driver + TIA.

DSP reuse: The architecture reuses the mass-produced 1.6T duplex DSP chip.

Optical engine: Silicon photonics DR8×2, supporting ELS external light sources. GIGALIGHT states that it already holds silicon-photonics patents related to external light sources for 800G/1.6T/3.2T.

Form factor: OSFP-XD / OSFP224 pluggable modules, compatible with existing switch front panels and air-cooling designs.

System-level coordination: Through CMIS and proprietary DSP-TAP registers, the reference clock, phase, and FEC margin of the DSP channels are exposed to the host for tuning. The linear channels can therefore “borrow” clock lock rather than having to perform phase acquisition from scratch.

III. Core Benefits Compared with Conventional Full-DSP 3.2T

IV. Four Major Commercial Benefits for AI Cluster

1. Support for pluggable 3.2T architectures with liquid cooling:
3.2T can support enhanced low-density OSFP air-cooled chassis.

2. Reduce dependence on DSP production capacity:
There is no need to compete for new 3.2T DSP capacity; a “half of an existing DSP” can support twice the bandwidth.

3. Open tuning and customer control:
The host system can adjust equalization, gain, and FEC strategies, shortening the joint-debugging cycle for customer-developed switches.

4. Smooth migration toward NPO/CPO:
The same “half-system-coordination” concept can be extended downward to NPO optical engines.

V. Product Roadmap

✅ 800G OSFP HYBRID DR8 / 2×DR4: Mature, with prototypes already available.

✅ 1.6T OSFP-HRO 2×DR4 HYBRID: Prototypes already available.

3.2T OSFP-XD/OSFP HYBRID silicon-photonics pluggable modules: Supported in the roadmap.

3.2T pluggable optical modules with external light sources, as well as enhanced 3.2T NPO silicon-photonics engines: Supported in the roadmap.

VI. GIGALIGHT’s View

«“HYBRID technology can provide a better power-consumption balance for 3.2T pluggable optical modules. It can also evolve into an enhanced 3.2T NPO silicon-photonics engine, with guaranteed 500m transmission.”»

— GIGALIGHT Product Strategy Department

14Sep, 2026

GIGALIGHT Hybrid Technology Enables 1.6T AI Interconnect Architecture to Break Free from Liquid Cooling Dependency — ECOC 2026 Demonstration

September 14, 2026, Shenzhen, China. – As AI training clusters scale to 100,000 GPUs and beyond, 1.6T high-speed optical transceivers are becoming a critical hardware component for data center interconnects (DCI) between racks. Mainstream 1.6T transceivers based on full-DSP architectures typically consume 25–28W. In high-density OSFP switch racks, this level of power consumption exceeds the practical thermal capacity of conventional air cooling, making liquid-cooling upgrades increasingly necessary for large-scale deployment.

Liquid cooling not only requires significant capital investment in servers, racks, piping, and monitoring systems, but also involves data center infrastructure upgrades and major changes to operation and maintenance processes. This substantially increases the deployment threshold and Total Cost of Ownership (TCO) for AI computing expansion.

Numerical Basis

1. Air-cooling limit: approximately 25W

For conventional pluggable OSFP optical transceivers, thermal capacity is constrained by rack airflow, inlet/outlet temperatures, and the high-density deployment of 8×200G channels. In practical high-density rack environments, the power capacity of air cooling is typically around 25W.

2. Full-DSP architectures exceed the limit: 25–28W

Power consumption above the practical air-cooling limit requires liquid cooling or enhanced thermal management in high-density racks. This is also one of the reasons why platforms such as NVIDIA GB200 have adopted liquid cooling as a standard solution.

3. Hybrid architecture leaves sufficient thermal headroom: 18W

With a maximum power consumption of only 18W, the Hybrid solution operates more than 7W below the typical air-cooling limit. It can therefore be deployed directly in existing air-cooled switch racks. This provides significant value for customers upgrading existing data center infrastructure and for AI computing customers who prefer to avoid liquid-cooling deployment.

4. Pure LPO offers lower power consumption, but with architectural trade-offs: 10–16W

Pure LPO solutions offer the lowest power consumption, but require next-generation switch ASICs with built-in DSP capabilities. As a result, they cannot provide the same plug-and-play compatibility with existing switch platforms.

As the inventor of Hybrid technology, GIGALIGHT will demonstrate at ECOC 2026 in Europe a key technology option designed to eliminate the need for mandatory liquid cooling in 1.6T interconnect deployments: the 1.6T OSFP224-HRO 2×DR4 heterogeneous silicon photonics transceiver, featuring a maximum power consumption of only 18W.

1.6T Hybrid Architecture Diagram

Key Product Advantages

1. Exceptional Energy Efficiency with Significantly Reduced Power Consumption

The transceiver features a maximum operating power consumption of only 18W across the full operating range. Compared with mainstream 3nm full-DSP solutions with equivalent specifications, power consumption is reduced by approximately 28%–35%. This significantly alleviates thermal pressure in high-density racks while reducing long-term power consumption and O&M TCO in AI and HPC data centers.

2. Robust Transmission Across the Full Operating Range with BER Performance Beyond Protocol Requirements

Across the full operating temperature range, the BER performance of all eight channels exceeds the requirements defined by the 1.6T OSFP-DR8 international protocol specification. The solution provides enhanced stability for high-speed, long-reach transmission and can reliably support 500-meter short- and medium-distance interconnects in AI clusters.

3. Proprietary Cross-Channel Coordination Mechanism Addresses Key Limitations of Pure LPO Architectures

The product retains DSP-based signal-processing capabilities for critical channels and supports cross-channel signal enhancement, clock calibration, and phase synchronization. It enables real-time error correction and timing optimization for linear LPO links, addressing key industry challenges associated with pure linear architectures, including link instability, limited self-diagnostic capabilities, and difficult network adaptation.

This approach combines low power consumption with practical commercial deployability.

“Many AI computing customers are currently facing a difficult choice: deploying full-DSP 1.6T solutions requires costly liquid-cooling upgrades, while adopting LPO/NPO architectures requires a fundamental redesign of the system hardware. The core value of the Hybrid heterogeneous architecture is to break this dilemma.”

“By retaining a portion of DSP capabilities inside the transceiver, we can keep power consumption within the range supported by conventional air cooling while protecting customers’ existing data center investments. This provides a practical path for smoothly upgrading existing AI computing clusters to 1.6T interconnects.”

— GIGALIGHT Technical Lead

About GIGALIGHT

As an open optical networking explorer, GIGALIGHT integrates the design, manufacturing, and sales of both active and passive optical devices and subsystems. The company’s product portfolio includes III-V optical modules, silicon photonics modules and silicon-based NPO/CPO engines, liquid-cooled optical modules, passive optical components, Active Optical Cables (AOCs), Direct Attach Cables (DACs), coherent optical communication modules, OPEN DCI BOX subsystems based on coherent and O-band DWDM optical modules, and UHD SDI video optical transceivers. GIGALIGHT focuses on applications including AI data centers, 5G transport networks, metropolitan WDM transmission, and ultra-HD broadcast and video, positioning itself as an innovative designer of high-speed optical interconnect hardware solutions.

8Sep, 2026

LPO vs. Hybrid Semi-DSP｜A Comprehensive Comparison of AI Computing Networking Solutions

I. First, Clarifying the Fundamental Architectures

LPO (Linear-Drive Pluggable Optics)

LPO uses a direct-drive architecture in which the transmitter laser is driven directly by the electrical Driver, while the receiver uses a linear TIA. The DSP chip is completely eliminated from the optical module.

Signal equalization, compensation, and retiming are handled entirely by the high-performance SerDes inside the switch ASIC. The primary goal is to achieve ultra-low power consumption and maximize energy efficiency.

Hybrid Semi-DSP

Hybrid Architecture Diagram

A Hybrid Semi-DSP solution integrates a lightweight and streamlined DSP inside the optical module, retaining basic digital equalization, signal compensation, and configurable tuning capabilities on the Tx/Rx side.

Instead of implementing the complex long-distance dispersion and nonlinear compensation algorithms of a full DSP, the Hybrid architecture strikes a balance among power consumption, performance, and controllability. It also enables open parameter tuning through a host system.

DSP-TAP Parameter Tuning via Host System

GIGALIGHT provides Hybrid optical solutions designed to combine the low-power advantages of LPO with the flexibility, link margin, diagnostics, and configurability of DSP-based optics.

II. Core Comparison from an AI Computing Networking Perspective

1. Power Consumption

LPO:

LPO has a clear advantage in power consumption. By eliminating the DSP, it removes the DSP power overhead and can achieve the lowest module power consumption. This is particularly attractive for short-reach links in high-density AI racks where reducing TCO and power consumption is a top priority.

Hybrid:

Hybrid consumes more power than LPO but significantly less than conventional full-DSP optics. Through dynamic algorithm enable/disable control, power consumption can be adjusted according to actual link conditions.

Trade-off:

LPO provides fixed ultra-low power consumption, while Hybrid provides dynamically adjustable power-performance optimization.

2. Link Margin and Transmission Distance

LPO:

Link compensation relies entirely on the switch SerDes, while the optical module itself has limited signal recovery and compensation capability. As a result, LPO can be more sensitive to fiber quality, connector cleanliness, and temperature fluctuations.

Typical applications:

In-rack and short rack-to-rack links, generally up to 100 m, particularly in newly deployed AI clusters with high-quality cabling.

As cabling ages, patching stages increase, or link distances become longer, the available link margin can decrease rapidly.

Hybrid:

The integrated lightweight DSP provides local signal recovery and compensation, offering greater link margin and stronger tolerance to link degradation.

Typical applications:

100–500 m data-center interconnects, mixed or legacy cabling environments, short- and medium-reach DCI, and upgrades of existing data centers.

3. System Dependency and Interoperability

LPO:

Because the optical module does not perform complete signal recovery, the module and switch SerDes must be jointly tuned and optimized.

Different switch vendors may have significant differences in SerDes performance and implementation, making cross-vendor interoperability and mixed-brand deployment more challenging. As a result, LPO is particularly suited to vertically integrated and highly customized AI clusters.

Hybrid:

The module performs basic signal recovery independently, retaining the plug-and-play characteristics of conventional optical transceivers.

This reduces the optical module’s dependence on a specific switch ASIC implementation and facilitates multi-vendor equipment deployment, making Hybrid more suitable for open and heterogeneous AI computing networks.

4. Operations, Monitoring, and Fault Diagnosis

LPO:

Without a DSP, LPO generally provides only basic optical monitoring such as Tx/Rx optical power. Advanced information such as eye diagrams, error statistics, and dispersion-related parameters is more limited.

When bit errors occur, it can be difficult to quickly determine whether the root cause is the fiber, optical components, connectors, or the switch. This can significantly increase troubleshooting costs in large-scale AI clusters.

Hybrid:

The lightweight DSP can retain digital diagnostics capabilities, including real-time error monitoring, signal-quality analysis, and link-degradation warnings.

This enables clearer fault isolation and is advantageous for large-scale deployments requiring sophisticated network operations and maintenance.

Hybrid solutions can also support host-side configurable equalization and tuning strategies, enabling more granular management and optimization of AI computing networks.

5. Supply Chain and Mass-Production Cost

LPO:

The simplified architecture eliminates the expensive DSP, theoretically enabling the lowest BOM cost.

However, LPO places more stringent performance requirements on optical components, lasers, and photodetectors. As data rates continue to increase, particularly toward 224G PAM4, maintaining production yield becomes increasingly challenging.

In this architecture, a significant portion of the system-level value shifts toward the switch SerDes and ASIC vendors.

Hybrid:

The use of a lightweight semi-DSP increases BOM cost compared with pure LPO.

However, the value of the solution can remain within the optical module vendor through algorithm optimization, adaptive tuning, and implementation know-how. The architecture also provides greater tolerance to optical and manufacturing variations, resulting in a wider production window.

6. Business Application Scenarios

(1) In-Rack / Very Short-Reach Connections in AI Training Clusters → LPO is More Suitable

Extremely short distances, new cabling, highly integrated architectures, and a strong focus on maximum power efficiency make LPO attractive for densely packed AI compute environments.

(2) Rack-to-Rack, POD-to-POD, Legacy Data Center Upgrades, and SMB/Enterprise AI Computing Centers → Hybrid Has Greater Advantages

More complicated cabling, longer link distances, multi-vendor equipment, and the need for network control, diagnostics, and open tuning capabilities make Hybrid a more flexible choice.

(3) Short- and Medium-Reach DCI → Hybrid

LPO can become less practical as distance and link complexity increase.

Hybrid can adapt to different fiber and link conditions through open parameter tuning, making it a potential cost-effective option for short- and medium-reach DCI applications.

III. Overall Industry Positioning

LPO: Ultra-Low-Power Short-Reach AI Computing Solution

Key value proposition:

Ultra-low power consumption, highly customized architecture, short-reach applications, and newly deployed high-density AI clusters.

LPO achieves maximum power efficiency by trading away some link margin, interoperability, and diagnostic flexibility.

Hybrid: Open, Configurable, and Flexible AI Computing Solution

Key value proposition:

Configurable power consumption, stronger link margin, host-side tuning, better diagnostics, multi-vendor compatibility, and support for legacy network environments.

Rather than pursuing the absolute minimum power consumption, Hybrid delivers greater flexibility, operational control, and long-term value across a wider range of AI networking scenarios.

GIGALIGHT Hybrid Product Portfolio

GIGALIGHT ‘s Hybrid portfolio is positioned to bridge the gap between pure LPO and conventional full-DSP optics, providing an open and configurable architecture for next-generation AI computing networks.

IV. The Real Trend in AI Computing Networking

LPO and Hybrid are not simply replacement technologies. They are complementary architectures for different layers of the AI networking infrastructure.

At the innermost layer of the AI rack, where link distances are extremely short and power efficiency is the overriding priority, LPO can be used to minimize power consumption.

For POD-to-POD, rack-to-rack, data-center-wide, and short-/medium-reach DCI connectivity, Hybrid solutions can provide greater link margin, interoperability, diagnostics, and configuration flexibility.

Together, LPO and Hybrid can form a layered and complementary optical interconnect architecture for AI computing, balancing power efficiency, performance, deployment flexibility, and long-term network operability.

7Sep, 2026

GIGALIGHT: Hybrid Retimed-Channel Architecture Enters Evaluation by Global Hyperscalers

September 7, 2026, Shenzhen, China. – As the optical interconnect industry enters a critical transition period from 800G to 1.6T, the industry has been seeking an optimal solution between ultra-low-power LPO/LRO and high-margin full-DSP architectures. With its differentiated advantages of flexibility, controllability, balanced power consumption, and robust link performance, the half-DSP heterogeneous Hybrid architecture is moving beyond vendor innovation and onto the system evaluation lists of global hyperscalers.

Microsoft and Meta, which have long played leading roles in defining next-generation data center interconnect standards, have already completed system simulations and feasibility assessments through international open technology forums such as OIF and OCP. Their core concept is to deploy retimed channels and linear-receive channels on the same port, using high-quality retimed channels with DSP-based compensation as a link reference, while assisting the switch SerDes in performing coordinated equalization optimization for the linear channels. This approach aims to control overall system power consumption while improving the interference resistance and transmission robustness of parallel optical links.

Unlike the single-design logic of fully symmetric LRO or LPO implementations, the Hybrid-channel system concept breaks the conventional either-or technology choice.

Purely linear solutions offer power advantages, but are highly sensitive to link margin and strongly dependent on cabling quality and switch-chip capabilities;
Full-DSP solutions provide strong link stability, but come with higher overall system power consumption;
Hybrid retimed architecture introduces a new compromise: some channels retain independent signal compensation and link diagnostic capabilities, while the remaining channels use linear reception to achieve power savings, enabling a dynamic balance among performance, power consumption, and operational maintainability.

The following illustrates the complete clock-recovery principle of Hybrid LRO (4 full-DSP channels + 4 linear-receive channels):

Hybrid Architecture Diagram

Four channels with RX DSP: Clock recovery is completed inside the optical module
Four LRO linear channels: The module has no CDR; all clock recovery is performed by the switch SerDes, with two operating modes (Independent Mode / Coordinated Reference Mode)

Interpretation 1: CDR Principle of the Four RX-DSP Channels (Module-Side Closed-Loop Recovery)

Process: Optical signal → PD optical-to-electrical conversion → TIA amplification → ADC sampling → CDR circuit inside the module RX DSP

The ADC samples the received analog signal using a locally free-running high-speed clock.
The CDR continuously compares the edge phase of the sampled data with the ideal data phase and calculates the phase error.
Through digital loop filtering, the sampling-clock phase is dynamically adjusted to align with the signal transition edges.
An aligned, low-jitter recovered clock and clean data stream are then output.
At the same time, error statistics and jitter margin are monitored, with diagnostic information reported through CMIS.

Interpretation 2: Basic Principle of the Four Linear LRO Channels (Standard Independent Mode)

These four channels have no ADC, on-chip DSP, or CDR.

Process: Optical signal → PD → Linear TIA → High-speed analog electrical signal directly output to the switch ASIC

Each SerDes lane inside the switch has its own independent CDR.
Each lane independently captures the analog-signal edges and completes clock-phase locking.
By default, the clocks of all eight channels operate independently without referencing one another.

Key Interpretation: Enhanced Coordinated Mode (System-Level Optimization Unique to the Hybrid Architecture)

With support from switch-level algorithms:

The four module-side DSP channels first establish a stable set of high-quality reference clock and phase information.
The ASIC uses this validated clock reference as the initial phase prediction and jitter constraint for the CDRs of the four linear channels.
The CDRs of the linear channels no longer need to blindly search for the correct phase from scratch. Instead, the phase-search range is narrowed, enabling faster clock recovery while reducing clock offset and jitter variation among parallel channels.

While hyperscalers have so far focused primarily on system-level architecture analysis and simulation validation, GIGALIGHT has moved ahead of the industry by turning this innovative concept into an engineered, practical solution.

GIGALIGHT Hybrid Product Portfolio：

1.6T OSFP-HRO 2×DR4 Silicon Photonics Transceiver
800G OSFP-HRO 2×DR4 Silicon Photonics Transceiver
800G OSFP HYBRID VR8-AOC Active Optical Cable
800G OSFP HYBRID PSM8-AOC Active Optical Cable

Based on this Hybrid-channel concept, GIGALIGHT’s Hybrid half-DSP heterogeneous silicon photonics transceivers adopt a differentiated channel architecture: four channels retain full RX-DSP compensation capability, while the other four channels employ a linear-receive architecture with DSP pre-emphasis on the transmit side.

The product portfolio covers two major form factors: 800G/1.6T OSFP-HRO 2×DR4 and HYBRID PSM8-AOC. These products transform forward-looking concepts discussed in open industry forums into testable, scalable, and mass-producible commercial hardware solutions.

From the perspective of comprehensive networking value in complex real-world data-center environments, while Microsoft and Meta are driving the implementation of LRO standards, major industry players are also beginning to evaluate the system-level value of a Hybrid retimed architecture with greater practical deployment potential.

This Hybrid retimed solution points directly to the Hybrid half-DSP technology roadmap.

In One Sentence

The key difference between a Hybrid linear channel and a conventional LRO channel is that pure LRO lacks system-level clock and phase synchronization capabilities. This is precisely the underlying value of Hybrid technology, giving it strong potential to become a mainstream technology direction for next-generation private AI computing networks.

About GIGALIGHT

7Sep, 2026

Balancing Tech Exploration & Mass‑Production Readiness: GIGALIGHT Unveils Crimp‑Socket‑Based 1.6T NPO for Rational High‑Speed Interconnect Evolution

September 7, 2026, Shenzhen, China. – Amid the rapid growth of AI computing, 1.6T near-package optical interconnect technology is approaching a critical crossroads between sample validation and commercial deployment. As of September 2026, GIGALIGHT has completed a shippable engineering sample of a socket-based 1.6T NPO solution defined under the OIF standards, demonstrating the excellent transmission performance of near-package optical interconnects in ultra-high-bandwidth applications.

However, the thermal expansion mismatch associated with Flip-Chip processes, together with the challenges of maintaining socket compression consistency at high-volume production scale, has created widely recognized barriers to mass production. These challenges remain key factors limiting the large-scale deployment of NPO technology in million-unit-class data center environments.

The First-Generation Commercial 1.6T DR16 NPO Silicon Photonics Engine to Be Demonstrated at CIOE & ECOC 2026

First, inherent material constraints associated with Flip-Chip bonding.

Different packaging materials have different coefficients of thermal expansion. Under long-term high- and low-temperature cycling in data centers, combined with continuous high-power operation, microscopic mechanical stress can accumulate and shift over time, directly causing variations in optical coupling loss.

Controlling performance variation across production batches remains challenging, while long-term reliability requirements can be difficult to meet under the stringent lifecycle qualification standards of cloud service providers. This can significantly increase the cost of yield management and quality control during mass production.

Second, the challenge of Socket press-fit assembly consistency.

NPO relies on Socket-based press-fit assembly to achieve high-density interconnection. During high-volume manufacturing and field installation, even small variations in press-fit force or alignment tolerances can result in unpredictable differences in optical performance.

For data center clusters deployed at million-unit scale, uncontrolled assembly variation can translate directly into higher operation and maintenance costs, creating substantial risks for large-scale commercial procurement.

GIGALIGHT’s investment in Socket-based 1.6T NPO reflects a comprehensive and disciplined approach to technology evaluation: we validate emerging architectures early to maintain our ability to explore next-generation computing interconnects, while simultaneously maintaining a rational assessment of their commercial viability.

We clearly distinguish between technical feasibility in the laboratory and manufacturability at data-center scale. Rather than blindly committing to a single technology path, GIGALIGHT pursues multiple architectures in parallel, accumulating engineering data and developing a deeper understanding of the benefits, limitations, and trade-offs associated with each approach.

The competition in high-speed optical interconnects has never been simply a race to see who can produce a prototype first. It is a full-lifecycle test spanning R&D, manufacturing, delivery, deployment, and long-term operation and maintenance.

From trial validation of press-fit Socket-based 1.6T NPO near-package optical interconnects to preparations for CPX-standardized solutions for the 224G era, GIGALIGHT remains focused on customers’ real-world deployment requirements. By balancing performance, power consumption, reliability, and mass-production costs, GIGALIGHT is committed to providing global AI computing clusters with high-speed interconnect solutions that are practical, scalable, and ready for large-scale deployment.

Leaving no gaps in technology exploration while moving forward with discipline in commercialization.
As computing infrastructure undergoes rapid transformation, GIGALIGHT continues to pursue a multi-path technology strategy, working alongside customers to navigate the next generation of high-speed optical interconnect technologies and their ongoing evolution.

About GIGALIGHT

7Sep, 2026

GIGALIGHT Deepens Hybrid Semi-DSP Technology: Open, Tunable Architecture Unlocks Greater Customer Control and Value

September 7, 2026, Shenzhen, China. – As hyperscale computing networks continue to evolve at an unprecedented pace, computing interconnects are no longer simply a matter of stacking standardized hardware. Cloud service providers and data center customers are placing increasing emphasis on link-level controllability, refined power management, and long-term total cost of ownership (TCO) optimization.

GIGALIGHT continues to make significant investments in its innovative Hybrid semi-DSP technology roadmap. Building on its design philosophy of open optical networking, GIGALIGHT gives end customers greater control over product usage and a stronger role in technology collaboration, delivering differentiated solutions for next-generation high-speed computing interconnects.

Hybrid Architecture Diagram:

Unlike the closed, fixed-function “black box” architecture of traditional full-DSP optical modules, GIGALIGHT’s Hybrid architecture retains open parameter-tuning capabilities through a host system. End users can independently configure signal equalization, optical power, and gain strategies, without being restricted to fixed algorithm parameters preset by module vendors.

With this customizable and controllable optical interconnect hardware, customers can build fully autonomous and controllable computing transmission systems, optimize performance according to their own traffic patterns and cluster deployment scenarios, and maintain greater control over the underlying network architecture.

DSP-TAP Parameter Tuning via Host System:

From the customer’s perspective, fine-grained parameter tuning delivers tangible benefits in both power efficiency and cost control. Across the full lifecycle of AI computing clusters, electricity consumption represents a significant portion of overall operating costs.

With the flexible configuration space provided by GIGALIGHT’s Hybrid solution, operations teams can reduce module power consumption during periods of low workload while unlocking optimal transmission performance during high-intensity AI training scenarios. This enables a dynamic balance between performance and power consumption while continuously reducing long-term data center operating costs.

At the same time, open debugging and tuning capabilities make it easier for customers to conduct joint validation of self-developed switches and optical engines, shortening the testing cycle for new architectures and accelerating the deployment and iteration of private computing networks.

Beyond the immediate benefits of product usage, the Hybrid model also enables end customers to participate more deeply in technology definition and product evolution. Traditionally, the technical specifications and performance boundaries of high-speed optical modules have been defined almost entirely by component vendors, leaving customers with limited options beyond selecting from available products.

GIGALIGHT’s open and tunable Hybrid solution changes this model. Cloud service providers and server OEMs can provide performance optimization requirements based on real-world application scenarios and actively participate in product iteration. Through closer collaboration between suppliers and customers, both sides can jointly refine interconnect standards optimized for AI computing environments, move beyond commoditized hardware competition, and build a customized high-speed optical interconnect ecosystem designed for next-generation high-performance computing clusters.

As global computing infrastructure continues to evolve toward greater diversification and customization, incremental optimization based solely on hardware specification upgrades is increasingly unable to satisfy the deeper requirements of leading computing customers.

GIGALIGHT remains committed to its differentiated Hybrid technology roadmap. Through an open and tunable product architecture, GIGALIGHT puts greater control of network optimization back into the hands of customers, empowering them to build energy-efficient, flexible, and fully controllable computing infrastructure while opening a new model of collaborative innovation for the global high-speed optical interconnect industry.

About GIGALIGHT

7Sep, 2026

Full-Stack HYBRID Product Portfolio to Reshape AI Computing Interconnect Architecture — GIGALIGHT to Showcase at CIOE & ECOC 2026

September 7, 2026, Shenzhen, China. – Two of the world’s leading optical communications industry events — the China International Optoelectronic Exposition (CIOE 2026) and the European Conference on Optical Communication (ECOC 2026) — will take place in September. As a global provider of differentiated high-speed optical interconnect solutions, GIGALIGHT will showcase its latest semi-DSP/HYBRID 1.6T silicon photonics transceiver family and HYBRID active copper cable products at both events.

Through architecture-level innovation, GIGALIGHT aims to overcome interconnect bottlenecks in AI computing clusters and provide data centers and high-performance computing (HPC) centers worldwide with next-generation optical interconnect solutions featuring low power consumption, high bandwidth, and cost efficiency.

The HYBRID product portfolio to be showcased includes:

1.6T OSFP-HRO 2×DR4 Silicon Photonics Transceiver
800G OSFP-HRO 2×DR4 Silicon Photonics Transceiver
800G OSFP HYBRID VR8-AOC Active Optical Cable
800G OSFP HYBRID PSM8-AOC Active Optical Cable

I. Addressing Industry Challenges and Rebuilding the Foundation of AI Computing Interconnects

HYBRID Architecture

As the scale of AI large-model training clusters surpasses the 100,000-GPU level, conventional pluggable optical transceiver solutions face three major challenges: high power consumption, high latency, and high cost, which have become critical bottlenecks limiting the efficiency of AI computing infrastructure.

Although LPO optical modules have attracted significant industry attention, their performance constraints have limited their deployment in practical applications.

At this year’s exhibitions, GIGALIGHT will showcase its semi-DSP/HYBRID 800G silicon photonics transceiver, featuring an innovative hybrid architecture that combines half DSP and half linear direct drive. This architecture retains the advantages of a pluggable form factor while significantly simplifying the signal-processing chain.

Compared with conventional full-DSP solutions, the HYBRID architecture can reduce overall power consumption by more than 30% and compress end-to-end latency to the sub-microsecond level. Meanwhile, the high degree of component reuse enabled by silicon photonics integration reduces overall system costs by more than 25%.

II. Three Core Advantages Redefining the 800G/1.6T Interconnect Benchmark

Low Power Consumption

Compared with conventional full-DSP 800G/1.6T silicon photonics transceivers, the HYBRID architecture reduces overall power consumption by 25%–35%.

Typical operating power can be controlled to below 12W for 800G and below 21W for 1.6T.

A single module can potentially save nearly 100 kWh of electricity per year in a data center, while a cluster deployed at a scale of tens of thousands of modules could achieve annual electricity savings reaching the million-kWh level.

High Cost Efficiency

By reducing DSP resource requirements and reusing mature silicon photonics integration technologies, the HYBRID architecture can reduce overall BOM costs by more than 20%.

Stable Transmission Performance

Leveraging the high level of integration provided by silicon photonics, the solution can achieve a pre-FEC BER at the E-8 level in 50-meter multimode transmission scenarios and a BER as low as E-9 over 500-meter single-mode fiber.

These capabilities fully meet the requirements for short- and medium-distance interconnects within and between racks in AI computing centers. The modules can be directly deployed without requiring additional hardware tuning of existing switches or network interface cards (NICs).

III. Joint Presence at CIOE and ECOC: Demonstrating the Feasibility and Reliability of Semi-DSP Copper and Optical Interconnects

To demonstrate the practical value of its HYBRID architecture, GIGALIGHT’s technical team will conduct demonstrations using its self-developed CHECKER loopback testing system, together with on-site validation using NVIDIA switches.

The demonstrations will provide global cloud service providers and industry partners with an in-depth explanation of the technical specifications and implementation of the semi-DSP architecture, helping accelerate the integration of this innovative solution into the global AI computing infrastructure supply chain.

“As AI computing infrastructure enters a sustained period of strong growth, GIGALIGHT’s global showcase of its semi-DSP/HYBRID product portfolio — particularly the global debut of its 1.6T HYBRID silicon photonics transceiver — will introduce a new architectural approach to the global optical communications industry. It will help accelerate the evolution of AI computing interconnects toward a better balance among power consumption, latency, and performance,” said a GIGALIGHT technical representative.